236 search results - page 9 / 48 » Chordal Topologies for Interconnection Networks |
IPPS
2006
IEEE
14 years 2 months ago
2006
IEEE
Current trends in high-performance parallel computers show that fat-tree interconnection networks are one of the most popular topologies. The particular characteristics of this to...
EUROPAR
2005
Springer
14 years 2 months ago
2005
Springer
In this paper we introduce INSEE, an environment to help in the design of interconnection networks for parallel computing systems. It contains two basic modules: a system to genera...
NOCS
2010
IEEE
13 years 6 months ago
2010
IEEE
The number of cores present on-chip is increasing rapidly. The on-chip network that connects these cores needs to scale efficiently. The topology of on-chip networks is an importan...
ASAP
2003
IEEE
14 years 2 months ago
2003
IEEE
On-chip implementation of multiprocessor systems requires the planarization of the interconnect network onto the silicon floorplan. Manual floorplanning approaches will become i...
DAC
2008
ACM
2008
ACM
An area-efficient high-throughput hybrid interconnection network for single-chip parallel processing
14 years 9 months ago
Single-chip parallel processing requires high bandwidth between processors and on-chip memory modules. A recently proposed Mesh-of-Trees (MoT) network provides high throughput and...