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» Circuit Bipartitioning Using Genetic Algorithm
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VTS
1998
IEEE
97views Hardware» more  VTS 1998»
14 years 3 months ago
On the Identification of Optimal Cellular Automata for Built-In Self-Test of Sequential Circuits
This paper presents a BIST architecture for Finite State Machines that exploits Cellular Automata (CA) as pattern generators and signature analyzers. The main advantage of the pro...
Fulvio Corno, Nicola Gaudenzi, Paolo Prinetto, Mat...
ICES
1998
Springer
131views Hardware» more  ICES 1998»
14 years 3 months ago
Aspects of Digital Evolution: Geometry and Learning
In this paper we present a new chromosome representation for evolving digital circuits. The representation is based very closely on the chip architecture of the Xilinx 6216 FPGA. W...
Julian F. Miller, Peter Thomson
EH
1999
IEEE
125views Hardware» more  EH 1999»
14 years 3 months ago
Improving Correctness of Finite-State Machine Synthesis from Multiple Partial Input/Output Sequences
Our previous work focused on the synthesis of sequential circuits based on a partial input/output sequence. As the behavioural description of the target circuit is not known the c...
Prabhas Chongstitvatana, Chatchawit Aporntewan
DAC
2006
ACM
14 years 12 months ago
Architecture-aware FPGA placement using metric embedding
Since performance on FPGAs is dominated by the routing architecture rather than wirelength, we propose a new architecture-aware approach to initial FPGA placement that models the ...
Padmini Gopalakrishnan, Xin Li, Lawrence T. Pilegg...
DAC
2008
ACM
14 years 20 days ago
Topology synthesis of analog circuits based on adaptively generated building blocks
This paper presents an automated analog synthesis tool for topology generation and subsequent circuit sizing. Though sizing is indispensable, the paper mainly concentrates on topo...
Angan Das, Ranga Vemuri