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» Circuit Partitioning with Complex Resource Constraints in FP...
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FPGA
2010
ACM
250views FPGA» more  FPGA 2010»
14 years 4 months ago
Variation-aware placement for FPGAs with multi-cycle statistical timing analysis
Deep submicron processes have allowed FPGAs to grow in complexity and speed. However, such technology scaling has caused FPGAs to become more susceptible to the effects of process...
Gregory Lucas, Chen Dong, Deming Chen
ASPDAC
2005
ACM
138views Hardware» more  ASPDAC 2005»
14 years 1 months ago
Crowdedness-balanced multilevel partitioning for uniform resource utilization
In this paper, we propose a new multi-objective multilevel K-way partitioning which is aware of resource utilization distribution, assuming the resource utilization for a partitio...
Yongseok Cheon, Martin D. F. Wong
GLVLSI
2009
IEEE
189views VLSI» more  GLVLSI 2009»
14 years 2 months ago
High-performance, cost-effective heterogeneous 3D FPGA architectures
In this paper, we propose novel architectural and design techniques for three-dimensional field-programmable gate arrays (3D FPGAs) with Through-Silicon Vias (TSVs). We develop a...
Roto Le, Sherief Reda, R. Iris Bahar
FPGA
2005
ACM
195views FPGA» more  FPGA 2005»
14 years 1 months ago
Sparse Matrix-Vector multiplication on FPGAs
Floating-point Sparse Matrix-Vector Multiplication (SpMXV) is a key computational kernel in scientific and engineering applications. The poor data locality of sparse matrices sig...
Ling Zhuo, Viktor K. Prasanna
VLSID
1999
IEEE
100views VLSI» more  VLSID 1999»
13 years 11 months ago
Satisfiability-Based Detailed FPGA Routing
In this paper we address the problem of detailed FPGA routing using Boolean formulation methods. In the context of FPGA routing where routing resources are fixed, Boolean formulat...
Gi-Joon Nam, Karem A. Sakallah, Rob A. Rutenbar