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ISCA
2012
IEEE
243views Hardware» more  ISCA 2012»
11 years 10 months ago
Lane decoupling for improving the timing-error resiliency of wide-SIMD architectures
A significant portion of the energy dissipated in modern integrated circuits is consumed by the overhead associated with timing guardbands that ensure reliable execution. Timing ...
Evgeni Krimer, Patrick Chiang, Mattan Erez
DAC
2010
ACM
13 years 5 months ago
MFTI: matrix-format tangential interpolation for modeling multi-port systems
Numerous algorithms to macromodel a linear time-invariant (LTI) system from its frequency-domain sampling data have been proposed in recent years [1, 2, 3, 4, 5, 6, 7, 8], among w...
Yuanzhe Wang, Chi-Un Lei, Grantham K. H. Pang, Nga...
DAC
2005
ACM
14 years 8 months ago
Robust gate sizing by geometric programming
We present an efficient optimization scheme for gate sizing in the presence of process variations. Using a posynomial delay model, the delay constraints are modified to incorporat...
Jaskirat Singh, Vidyasagar Nookala, Zhi-Quan Luo, ...
DAC
1999
ACM
14 years 8 months ago
Equivalent Elmore Delay for RLC Trees
- Closed form solutions for the 50% delay, rise time, overshoots, and settling time of signals in an RLC tree are presented. These solutions have the same accuracy characteristics ...
Eby G. Friedman, José Luis Neves, Yehea I. ...
ISQED
2005
IEEE
95views Hardware» more  ISQED 2005»
14 years 1 months ago
Simulating and Improving Microelectronic Device Reliability by Scaling Voltage and Temperature
The purpose of this work is to explore how device operation parameters such as switching speed and power dissipation scale with voltage and temperature. We simulated a CMOS ring o...
Xiaojun Li, Joerg D. Walter, Joseph B. Bernstein