96 search results - page 17 / 20 » Circuit modeling for practical many-core architecture design... |
DAC
1999
ACM
14 years 8 months ago
1999
ACM
Recently, several algorithms for interconnect optimization via repeater insertion and wire sizing have appeared based on the Elmore delay model. Using the Devgan noise metric [6] ...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
As VLSI technology scales toward 65nm and beyond, both timing and power performance of integrated circuits are increasingly affected by process variations. In practice, people oft...
MOBIHOC
2008
ACM
14 years 7 months ago
2008
ACM
We present BEND, a MAC layer solution to practical network coding in multi-hop wireless networks. It is the first exploration of the broadcasting nature of wireless channels to pr...
SPAA
2000
ACM
13 years 11 months ago
2000
ACM
Modern VLSI processing supports a two-dimensional surface for active devices along with multiple stacked layers of interconnect. With the advent of planarization, the number of la...
CODES
1999
IEEE
13 years 12 months ago
1999
IEEE
o much higher levels of abstraction than today's design practices, which are usually at the level of synthesizable RTL for custom hardware or Instruction Set Simulator (ISS) f...