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MSE
2003
IEEE
101views Hardware» more  MSE 2003»
14 years 19 days ago
Internet-based Tool for System-On-Chip Project Testing and Grading
A tool has been developed to automate the testing and grading of design projects implemented in reprogrammable hardware. The server allows multiple students to test circuits in FP...
Christopher K. Zuver, Christopher E. Neely, John W...
AAAI
2007
13 years 9 months ago
Concurrent Action Execution with Shared Fluents
Concurrent action execution is important for plan-length minimization. However, action specifications are often limited to avoid conflicts arising from precondition/effect inter...
Michael Buro, Alexander Kovarsky
ISCAS
2007
IEEE
144views Hardware» more  ISCAS 2007»
14 years 1 months ago
Multiple-Width Bus Partitioning Approach to Datapath Synthesis
—A shared bus is a suitable structure for minimizing the interconnections costs in system synthesis. It has also been shown that the word-length of Functional Units has a great i...
Arash Ahmadi, Mark Zwolinski
EPIA
1999
Springer
13 years 11 months ago
YapOr: an Or-Parallel Prolog System Based on Environment Copying
YapOr is an or-parallel system that extends the Yap Prolog system to exploit implicit or-parallelism in Prolog programs. It is based on the environment copying model, as first imp...
Ricardo Rocha, Fernando M. A. Silva, Vítor ...
TVLSI
2010
13 years 2 months ago
Computation Error Analysis in Digital Signal Processing Systems With Overscaled Supply Voltage
It has been recently demonstrated that digital signal processing systems may possibly leverage unconventional voltage overscaling (VOS) to reduce energy consumption while maintaini...
Yang Liu, Tong Zhang, Keshab K. Parhi