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» Circuits, Pebbling and Expressibility
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ICCD
2001
IEEE
213views Hardware» more  ICCD 2001»
14 years 4 months ago
Analysis and Reduction of Capacitive Coupling Noise in High-Speed VLSI Circuits
Abstract-- Scaling the minimum feature size of VLSI circuits to sub-quarter micron and its clock frequency to 2GHz has caused crosstalk noise to become a serious problem, that degr...
Payam Heydari, Massoud Pedram
ASYNC
2005
IEEE
118views Hardware» more  ASYNC 2005»
14 years 1 months ago
Modeling and Verifying Circuits Using Generalized Relative Timing
We propose a novel technique for modeling and verifying timed circuits based on the notion of generalized relative timing. Generalized relative timing constraints can express not ...
Sanjit A. Seshia, Randal E. Bryant, Kenneth S. Ste...
CC
2007
Springer
158views System Software» more  CC 2007»
13 years 7 months ago
The Complexity of Membership Problems for Circuits Over Sets of Natural Numbers
Abstract. The problem of testing membership in the subset of the natural numbers produced at the output gate of a {∪, ∩,− , +, ×} combinational circuit is shown to capture a...
Pierre McKenzie, Klaus W. Wagner
EAAI
2010
130views more  EAAI 2010»
13 years 7 months ago
Fault diagnosis in railway track circuits using Dempster-Shafer classifier fusion
This paper addresses the problem of fault detection and isolation in railway track circuits. A track circuit can be considered as a large-scale system composed of a series of trim...
Latifa Oukhellou, Alexandra Debiolles, Thierry Den...
NAR
2007
150views more  NAR 2007»
13 years 7 months ago
CellCircuits: a database of protein network models
CellCircuits (http://www.cellcircuits.org) is an openaccess database of molecular network models, designed to bridge the gap between databases of individual pairwise molecular int...
H. Craig Mak, Mike Daly, Bianca Gruebel, Trey Idek...