197 search results - page 21 / 40 » Circuits, Pebbling and Expressibility |
GLVLSI
2005
IEEE
14 years 1 months ago
2005
IEEE
The dependence of the propagation delay of the interlayer 3-D interconnects on the vertical through via location and length is investigated. For a variable vertical through via lo...
ATS
2003
IEEE
14 years 24 days ago
2003
IEEE
We present a framework for high-level design validation using an efficient register-transfer level (RTL) automatic test pattern generator (ATPG). The RTL ATPG generates the test ...
ISCAS
2002
IEEE
14 years 13 days ago
2002
IEEE
- In this paper, new formulations for the energy dissipation of lossy transmission lines driven by CMOS inverters are provided. These formulations are obtained using an approximate...
CORR
2007
Springer
13 years 7 months ago
2007
Springer
It is well known that, in theory, the general secure multiparty computation problem is solvable using circuit evaluation protocols. However, the communication complexity of the re...
PKC
2012
Springer
11 years 10 months ago
2012
Springer
Gentry’s bootstrapping technique is currently the only known method of obtaining a “pure” fully homomorphic encryption (FHE) schemes, and it may offers performance advantage...