90 search results - page 15 / 18 » Clock distribution using multiple voltages |
ISLPED
2003
ACM
14 years 2 months ago
2003
ACM
Ever shrinking device sizes and innovative micro-architectural and circuit design techniques have made it possible to have multi-million transistor systems running at multi-gigahe...
DAC
2009
ACM
14 years 9 months ago
2009
ACM
Exponentially rising cooling/packaging costs due to high power density call for architectural and software-level thermal management. Dynamic thermal management (DTM) techniques co...
IEEEPACT
2008
IEEE
14 years 3 months ago
2008
IEEE
This paper presents an energy management policy for reconfigurable clusters running a multi-tier application, exploiting DVS together with multiple sleep states. We develop a the...
IPPS
1998
IEEE
14 years 1 months ago
1998
IEEE
With aggressive superscalar processors delivering diminishing returns, alternate designs that make good use of the increasing chip densities are actively being explored. One such ...
HPCA
2009
IEEE
14 years 9 months ago
2009
IEEE
The shrinking processor feature size, lower threshold voltage and increasing clock frequency make modern processors highly vulnerable to transient faults. Architectural Vulnerabil...