— This paper presents models for estimating the transition activity of signals at the output of adders in Field Programmable Gate Arrays (FPGAs), given only word-level measures o...
Jonathan A. Clarke, George A. Constantinides, Pete...
In this paper we propose a RObust Analog Design tool (ROAD) for post-tuning analog/RF circuits. Starting from an initial design derived from hand analysis or analog circuit synthe...
Xin Li, Padmini Gopalakrishnan, Yang Xu, Lawrence ...
The High Level Architecture (HLA) is a standard for the interoperability and reuse of simulation components, referred to as federates. Large scale HLA-compliant simulations are bu...
An optimization algorithm for the design of combinational circuits that are robust to single-event upsets (SEUs) is described. A simple, highly accurate model for the SEU robustne...
We examine the robustness of critical infrastructure networks in the face of terrorist attack, using a simulation experiment that incorporates link capacity; and an extension of d...