476 search results - page 91 / 96 » Cluster-level feedback power control for performance optimiz... |
HIPC
1999
Springer
13 years 11 months ago
1999
Springer
We describe a radically new cache architecture and demonstrate that it offers a huge reduction in cache cost, size and power consumption whilst maintaining performance on a wide ra...
VEE
2009
ACM
14 years 2 months ago
2009
ACM
r of high-level languages lies in their abstraction over hardware and software complexity, leading to greater security, better reliability, and lower development costs. However, o...
INFOCOM
2009
IEEE
14 years 2 months ago
2009
IEEE
— In this work we study the problem of determining the throughput capacity of a wireless network. We propose a scheduling algorithm to achieve this capacity within an approximati...
ISCA
2010
IEEE
14 years 16 days ago
2010
IEEE
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...
HIPC
2000
Springer
13 years 11 months ago
2000
Springer
In this paper, we propose a distributed clustering algorithm for a multi-hop packet radio network. These types of networks, also known as ad hoc networks, are dynamic in nature due...