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» Code Compaction Using Genetic Algorithms
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ISCAS
2005
IEEE
138views Hardware» more  ISCAS 2005»
14 years 2 months ago
Modeling of MOS transistors based on genetic algorithm and simulated annealing
— A novel method to extract the efficient model for Metal-Oxide-Semiconductor (MOS) transistors in order to satisfy a specific accuracy is presented. The approach presented here ...
Mohammad Taherzadeh-Sani, Ali Abbasian, Behnam Ame...
IPPS
1998
IEEE
14 years 20 days ago
Synthesis of a Systolic Array Genetic Algorithm
The paper presents the design of a hardware genetic algorithm which uses a pipeline of systolic arrays. Demostrated is the design methodology, where a simple genetic algorithm exp...
Graham M. Megson, I. M. Bland
CGO
2010
IEEE
14 years 3 months ago
Integrated instruction selection and register allocation for compact code generation exploiting freeform mixing of 16- and 32-bi
For memory constrained embedded systems code size is at least as important as performance. One way of increasing code density is to exploit compact instruction formats, e.g. ARM T...
Tobias J. K. Edler von Koch, Igor Böhm, Bj&ou...
APIN
2000
120views more  APIN 2000»
13 years 8 months ago
Two-Loop Real-Coded Genetic Algorithms with Adaptive Control of Mutation Step Sizes
Genetic algorithms are adaptive methods based on natural evolution that may be used for search and optimization problems. They process a population of search space solutions with t...
Francisco Herrera, Manuel Lozano
GECCO
2010
Springer
163views Optimization» more  GECCO 2010»
14 years 21 hour ago
Factors affecting the use of genetic algorithms in test suite augmentation
Test suite augmentation techniques are used in regression testing to help engineers identify code elements affected by changes, and generate test cases to cover those elements. R...
Zhihong Xu, Myra B. Cohen, Gregg Rothermel