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ASPDAC
2007
ACM
156views Hardware» more  ASPDAC 2007»
14 years 29 days ago
Implementation of a Real Time Programmable Encoder for Low Density Parity Check Code on a Reconfigurable Instruction Cell Archit
- This paper presents a real time programmable irregular Low Density Parity Check (LDPC) Encoder as specified in the IEEE P802.16E/D7 standard. The encoder is programmable for fram...
Zahid Khan, Tughrul Arslan
GLOBECOM
2008
IEEE
14 years 3 months ago
High-Throughput Non-Orthogonal Interleaved Random Space-Time Coding for Multi-Source Cooperation
Abstract— In this paper, we propose a novel distributed Interleaved Random Space-Time Code (IR-STC) designed for MultiSource Cooperation (MSC) employing various relaying techniqu...
Rong Zhang, Lajos Hanzo
IEEEPACT
2000
IEEE
14 years 1 months ago
Instruction Scheduling for Clustered VLIW DSPs
Recent digital signal processors (DSPs) show a homogeneous VLIW-like data path architecture, which allows C compilers to generate efficient code. However, still some special rest...
Rainer Leupers
CODES
2000
IEEE
14 years 1 months ago
Heuristic tradeoffs between latency and energy consumption in register assignment
One of the challenging tasks in code generation for embedded systems is register allocation and assignment, wherein one decides on the placement and lifetimes of variables in regi...
R. Anand, Margarida F. Jacome, Gustavo de Veciana
CODES
2007
IEEE
14 years 3 months ago
A data protection unit for NoC-based architectures
Security is gaining increasing relevance in the development of embedded devices. Towards a secure system at each level of design, this paper addresses the security aspects related...
Leandro Fiorin, Gianluca Palermo, Slobodan Lukovic...