966 search results - page 144 / 194 » Code Generation for Embedded Processors |
EUROMICRO
1998
IEEE
14 years 1 months ago
1998
IEEE
The paper presents an approach to process scheduling for embedded systems. Target architectures consist of several processors and ASICs connected by shared busses. We have develop...
CODES
2005
IEEE
14 years 2 months ago
2005
IEEE
Majority of existing works on system level power estimation have focused on the processor, while there are very few that address power consumption of peripherals in a SoC. With th...
CODES
2004
IEEE
14 years 15 days ago
2004
IEEE
This paper proposes a novel Deadlock Avoidance Algorithm (DAA) and its hardware implementation, the Deadlock Avoidance Unit (DAU), as an Intellectual Property (IP) core that provi...
EWSN
2012
Springer
12 years 4 months ago
2012
Springer
Abstract. Some have argued that the dichotomy between high-performance operation and low resource utilization is false – an artifact that will soon succumb to Moore’s Law and c...
SBACPAD
2009
IEEE
14 years 3 months ago
2009
IEEE
RISC processors can be used to face the ever increasing demand for performance required by embedded systems. Nevertheless, this solution comes with the cost of poor code density. ...