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CASES
2008
ACM
13 years 10 months ago
StageNetSlice: a reconfigurable microarchitecture building block for resilient CMP systems
Although CMOS feature size scaling has been the source of dramatic performance gains, it has lead to mounting reliability concerns due to increasing power densities and on-chip te...
Shantanu Gupta, Shuguang Feng, Amin Ansari, Jason ...
CODES
2001
IEEE
14 years 11 days ago
Compiler-directed selection of dynamic memory layouts
Compiler technology is becoming a key component in the design of embedded systems, mostly due to increasing participation of software in the design process. Meeting system-level ob...
Mahmut T. Kandemir, Ismail Kadayif
DATE
2007
IEEE
108views Hardware» more  DATE 2007»
14 years 3 months ago
Speeding up SystemC simulation through process splitting
This paper presents a new approach that can be used to speed up SystemC simulations by automatically optimizing the model for simulation. The work addresses the inefficiency of th...
Youssef N. Naguib, Rafik S. Guindi
PLDI
2006
ACM
14 years 2 months ago
A global progressive register allocator
This paper describes a global progressive register allocator, a register allocator that uses an expressive model of the register allocation problem to quickly find a good allocat...
David Ryan Koes, Seth Copen Goldstein
DATE
2003
IEEE
117views Hardware» more  DATE 2003»
14 years 2 months ago
Exploring SW Performance Using SoC Transaction-Level Modeling
This paper presents VISTA, a new methodology and tool dedicated to analyse system level performance by executing full-scale SW application code on a transaction-level model of the...
Imed Moussa, Thierry Grellier, Giang Nguyen