Sciweavers

966 search results - page 68 / 194
» Code Generation for Embedded Processors
Sort
View
CODES
2008
IEEE
13 years 10 months ago
Specification-based compaction of directed tests for functional validation of pipelined processors
Functional validation is a major bottleneck in microprocessor design methodology. Simulation is the widely used method for functional validation using billions of random and biase...
Heon-Mo Koo, Prabhat Mishra
CODES
2001
IEEE
14 years 15 days ago
Embedded UML: a merger of real-time UML and co-design
In this paper, we present a proposal for a UML profile called `Embedded UML'. Embedded UML represents a synthesis of various ideas in the real-time UML community, and concept...
Grant Martin, Luciano Lavagno, Jean Louis-Guerin
DATE
2008
IEEE
114views Hardware» more  DATE 2008»
14 years 3 months ago
Synthesis of Fault-Tolerant Embedded Systems
This work addresses the issue of design optimization for faulttolerant hard real-time systems. In particular, our focus is on the handling of transient faults using both checkpoin...
Petru Eles, Viacheslav Izosimov, Paul Pop, Zebo Pe...
DATE
1998
IEEE
68views Hardware» more  DATE 1998»
14 years 1 months ago
Scheduling of Conditional Process Graphs for the Synthesis of Embedded Systems
We present an approach to process scheduling based on an abstract graph representation which captures both dataflow and the flow of control. Target architectures consist of severa...
Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alexa...
LCTRTS
2007
Springer
14 years 3 months ago
Tetris: a new register pressure control technique for VLIW processors
The run-time performance of VLIW (very long instruction word) microprocessors depends heavily on the effectiveness of its associated optimizing compiler. Typical VLIW compiler pha...
Weifeng Xu, Russell Tessier