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» Code Generation for Polynomial Multiplication
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CODES
2004
IEEE
13 years 11 months ago
A loop accelerator for low power embedded VLIW processors
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
Binu K. Mathew, Al Davis
TCC
2009
Springer
184views Cryptology» more  TCC 2009»
14 years 8 months ago
Secure Arithmetic Computation with No Honest Majority
We study the complexity of securely evaluating arithmetic circuits over finite rings. This question is motivated by natural secure computation tasks. Focusing mainly on the case o...
Yuval Ishai, Manoj Prabhakaran, Amit Sahai
CTCS
1989
Springer
13 years 11 months ago
Quantitative Domains, Groupoids and Linear Logic
We introduce the notion of a candidate for “multiple valued universal constructions” and define stable functors (which generalise functors with left adjoints) in terms of fac...
Paul Taylor 0002
VTC
2007
IEEE
161views Communications» more  VTC 2007»
14 years 1 months ago
Early Results on Hydra: A Flexible MAC/PHY Multihop Testbed
— Hydra is a flexible wireless network testbed being developed at UT Austin. Our focus is networks that support multiple wireless hops and where the network, especially the MAC,...
Ketan Mandke, Soon-Hyeok Choi, Gibeom Kim, Robert ...
PLDI
2009
ACM
14 years 2 months ago
Parallelizing sequential applications on commodity hardware using a low-cost software transactional memory
Multicore designs have emerged as the mainstream design paradigm for the microprocessor industry. Unfortunately, providing multiple cores does not directly translate into performa...
Mojtaba Mehrara, Jeff Hao, Po-Chun Hsu, Scott A. M...