245 search results - page 17 / 49 » Code Optimization Techniques for Embedded DSP Microprocessor... |
ASPLOS
1998
ACM
13 years 12 months ago
1998
ACM
Optimizations aimed at reducing the impact of memory operations on execution speed have long concentrated on improving cache performance. These efforts achieve a reasonable level...
LCTRTS
1999
Springer
13 years 12 months ago
1999
Springer
A Zero Overhead Loop Buffer (ZOLB) is an architectural feature that is commonly found in DSP processors. This buffer can be viewed as a compiler managed cache that contains a sequ...
DAC
2005
ACM
14 years 8 months ago
2005
ACM
In many of embedded systems, particularly for those with high data computations, the delay of memory access is one of the major bottlenecks in the system's performance. It ha...
LCTRTS
2005
Springer
14 years 1 months ago
2005
Springer
Efficient implementation of DSP applications is critical for many embedded systems. Optimising C compilers for embedded processors largely focus on code generation and instructio...
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
Retargetable C compilers are key components of today’s embedded processor design platforms for quickly obtaining compiler support and performing early processor architecture exp...