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GECCO
2000
Springer
182views Optimization» more  GECCO 2000»
13 years 11 months ago
A Novel Evolvable Hardware Framework for the Evolution of High Performance Digital Circuits
This paper presents a novel evolvable hardware framework for the automated design of digital circuits for high performance applications. The technique evolves circuits correspondi...
Ben I. Hounsell, Tughrul Arslan
CASES
2004
ACM
14 years 29 days ago
High-level power analysis for on-chip networks
As on-chip networks become prevalent in multiprocessor systemson-a-chip and multi-core processors, they will be an integral part of the design flow of such systems. With power in...
Noel Eisley, Li-Shiuan Peh
ERSHOV
1989
Springer
13 years 11 months ago
Experiments with Implementations of Two Theoretical Constructions
This paper reports two experiments with implementations of constructions from theoretical computer science. The first one deals with Kleene’s and Rogers’ second recursion the...
Torben Amtoft Hansen, Thomas Nikolajsen, Jesper La...
CODES
2007
IEEE
14 years 1 months ago
A low power VLIW processor generation method by means of extracting non-redundant activation conditions
This paper proposes a low power VLIW processor generation method by automatically extracting non-redundant activation conditions of pipeline registers for clock gating. It is impo...
Hirofumi Iwato, Keishi Sakanushi, Yoshinori Takeuc...
CODES
2007
IEEE
14 years 1 months ago
HW/SW co-design for Esterel processing
We present a co-synthesis approach that accelerates reactive software processing by moving the calculation of complex expressions into external combinational hardware. The startin...
Sascha Gädtke, Claus Traulsen, Reinhard von H...