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» Code Transformations to Improve Memory Parallelism
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CODES
2001
IEEE
14 years 7 days ago
Retargetable compilation for low power
Most research to date on energy minimization in DSP processors has focuses on hardware solution. This paper examines the software-based factors affecting performance and energy co...
Wen-Tsong Shiue
IPPS
2002
IEEE
14 years 1 months ago
Compile/Run-Time Support for Thread Migration
This paper describes a generic mechanism to migrate threads in heterogeneous distributed environments. To maintain high portability and flexibility, thread migration is implement...
Hai Jiang, Vipin Chaudhary
CODES
2005
IEEE
14 years 2 months ago
Iterational retiming: maximize iteration-level parallelism for nested loops
Nested loops are the most critical sections in many scientific and Digital Signal Processing (DSP) applications. It is important to study effective and efficient transformation ...
Chun Xue, Zili Shao, Meilin Liu, Edwin Hsing-Mean ...
ICS
2004
Tsinghua U.
14 years 2 months ago
Applications of storage mapping optimization to register promotion
Storage mapping optimization is a flexible approach to folding array dimensions in numerical codes. It is designed to reduce the memory footprint after a wide spectrum of loop tr...
Patrick Carribault, Albert Cohen
ICPP
2000
IEEE
14 years 1 months ago
Match Virtual Machine: An Adaptive Runtime System to Execute MATLAB in Parallel
MATLAB is one of the most popular languages for desktop numerical computations as well as for signal and image processing applic ations. Applying parallel processing techniques to...
Malay Haldar, Anshuman Nayak, Abhay Kanhere, Pramo...