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ICS
1999
Tsinghua U.
13 years 11 months ago
Reducing cache misses using hardware and software page placement
As the gap between memory and processor speeds continues to widen, cache efficiency is an increasingly important component of processor performance. Compiler techniques have been...
Timothy Sherwood, Brad Calder, Joel S. Emer
ISCA
2006
IEEE
182views Hardware» more  ISCA 2006»
14 years 1 months ago
Cooperative Caching for Chip Multiprocessors
This paper presents CMP Cooperative Caching, a unified framework to manage a CMP’s aggregate on-chip cache resources. Cooperative caching combines the strengths of private and ...
Jichuan Chang, Gurindar S. Sohi
CC
2003
Springer
14 years 20 days ago
Improving Data Locality by Chunking
Cache memories were invented to decouple fast processors from slow memories. However, this decoupling is only partial, and many researchers have attempted to improve cache use by p...
Cédric Bastoul, Paul Feautrier
MICRO
2002
IEEE
122views Hardware» more  MICRO 2002»
14 years 11 days ago
Microarchitectural denial of service: insuring microarchitectural fairness
Simultaneous multithreading seeks to improve the aggregate computation bandwidth of a processor core by sharing resources such as functional units, caches, TLB and so on. To date,...
Dirk Grunwald, Soraya Ghiasi
HPCC
2009
Springer
14 years 1 days ago
On Instruction-Level Method for Reducing Cache Penalties in Embedded VLIW Processors
Usual cache optimisation techniques for high performance computing are difficult to apply in embedded VLIW applications. First, embedded applications are not always well structur...
Samir Ammenouche, Sid Ahmed Ali Touati, William Ja...