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DAC
2012
ACM
12 years 20 days ago
A metric for layout-friendly microarchitecture optimization in high-level synthesis
In this work we address the problem of managing interconnect timing in high-level synthesis by generating a layoutfriendly microarchitecture. A metric called spreading score is pr...
Jason Cong, Bin Liu
CF
2009
ACM
14 years 4 months ago
Core monitors: monitoring performance in multicore processors
As we reach the limits of single-core computing, we are promised more and more cores in our systems. Modern architectures include many performance counters per core, but few or no...
Paul E. West, Yuval Peress, Gary S. Tyson, Sally A...
NAR
2007
145views more  NAR 2007»
13 years 9 months ago
Primer3Plus, an enhanced web interface to Primer3
Here we present Primer3Plus, a new web interface to the popular Primer3 primer design program as an enhanced alternative for the CGI- scripts that come with Primer3. Primer3 consi...
Andreas Untergasser, Harm Nijveen, Xiangyu Rao, To...
IPSN
2007
Springer
14 years 4 months ago
Probabilistic detection of mobile targets in heterogeneous sensor networks
Target detection and field surveillance are among the most prominent applications of Sensor Networks (SN). The quality of detection achieved by a SN can be quantified by evaluat...
Loukas Lazos, Radha Poovendran, James A. Ritcey
VLSID
2006
IEEE
134views VLSI» more  VLSID 2006»
14 years 10 months ago
ADC Precision Requirement for Digital Ultra-Wideband Receivers with Sublinear Front-Ends: A Power and Performance Perspective
This paper presents the power and performance analysis of a digital, direct sequence ultra-wideband (DS-UWB) receiver operating in the 3 to 4 GHz band. The signal to noise and dis...
Ivan Siu-Chuang Lu, Neil Weste, Sri Parameswaran