1165 search results - page 15 / 233 » Combined approach to system level performance analysis of em... |
DATE
2003
IEEE
14 years 1 months ago
2003
IEEE
We present a high-level synthesis algorithm solving the combined scheduling, allocation and binding problem minimizing area under both latency and maximum power per clock-cycle co...
ISVLSI
2008
IEEE
14 years 3 months ago
2008
IEEE
Future embedded systems will integrate hundreds of processors. Current design space exploration methods cannot cope with such a complexity. It is mandatory to extend these methods...
VTC
2006
IEEE
14 years 2 months ago
2006
IEEE
— In this contribution, we analyze the bit error rate (BER) performance of fast frequency hopping (FFH) assisted M-ary frequency shift keying (MFSK) using product combining. Prod...
HPCA
2008
IEEE
14 years 9 months ago
2008
IEEE
Portable, embedded systems place ever-increasing demands on high-performance, low-power microprocessor design. Dynamic voltage and frequency scaling (DVFS) is a well-known techniq...
RTS
2006
13 years 8 months ago
2006
Abstract The increasing complexity of heterogeneous systems-on-chip, SoC, and distributed embedded systems makes system optimization and exploration a challenging task. Ideally, a ...