362 search results - page 4 / 73 » Communication Mechanisms for Parallel DSP Systems on a Chip |
DSD
2006
IEEE
13 years 11 months ago
2006
IEEE
Abstract. Network-on-chip-based multiprocessor systems-onchip are considered as future embedded systems platforms. One of the steps in mapping an application onto such a parallel p...
MICRO
2006
IEEE
13 years 7 months ago
2006
IEEE
We examine the ability of CMPs, due to their lower onchip communication latencies, to exploit data parallelism at inner-loop granularities similar to that commonly targeted by vec...
ISCA
2012
IEEE
11 years 10 months ago
2012
IEEE
Memory system reliability is a serious and growing concern in modern servers. Existing chipkill-level memory protection mechanisms suffer from several drawbacks. They activate a l...
ICCD
2008
IEEE
14 years 4 months ago
2008
IEEE
—This paper presents a high-performance parallel context-based adaptive length coding (CAVLC) encoder implemented on a fine-grained many-core system. The software encoder is desi...
IPPS
2007
IEEE
14 years 2 months ago
2007
IEEE
With the continuous advances in optical communications technology, the link transmission speed of Internet backbone has been increasing rapidly. This in turn demands more powerful...