362 search results - page 6 / 73 » Communication Mechanisms for Parallel DSP Systems on a Chip |
ICPPW
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper concerns the design and verification of a realtime communication protocol for sensor data collection and processing between an embedded computer and a DSP. In such sys...
CORR
2006
Springer
13 years 7 months ago
2006
Springer
The design of complex Systems-on-Chips implies to take into account communication and memory access constraints for the integration of dedicated hardware accelerator. In this paper...
JSA
2010
13 years 2 months ago
2010
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
ISCAS
2011
IEEE
2011
IEEE
Parallel Dynamic Voltage and Frequency Scaling for stream decoding using a multicore embedded system
12 years 11 months ago
—Parallel structures may be used to increase a system processing speed in case of large amount of data or highly complex calculations. Dynamic Voltage and Frequency Scaling (DVFS...
IEEEPACT
2009
IEEE
14 years 2 months ago
2009
IEEE
Translation Lookaside Buffers (TLBs) are a staple in modern computer systems and have a significant impact on overall system performance. Numerous prior studies have addressed TL...