One of the most difficult and time-consuming steps in the creation of an FPGA is its transistor-level design and physical layout. Modern commercial FPGAs typically consume anywher...
Ketan Padalia, Ryan Fung, Mark Bourgeault, Aaron E...
—Power management at any abstraction level is a key issue for many mobile multimedia and embedded applications. In this paper a design workflow to generate system-level power mo...
Patrick Bellasi, William Fornaciari, David Siorpae...
This paper proposes a specialized memory structure called CA-RAM (Content Addressable Random Access Memory) to accelerate search operations present in many important real-world ap...
Sangyeun Cho, Joel R. Martin, Ruibin Xu, Mohammad ...
This paper investigates reconfigurable architectures suitable for chip multiprocessors (CMPs). Prior research has established that augmenting a conventional processor with reconfi...
Matthew A. Watkins, Mark J. Cianchetti, David H. A...