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» Comparative Analysis of Architectural Views Based on UML
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IPPS
2007
IEEE
14 years 1 months ago
Optimizing the Fast Fourier Transform on a Multi-core Architecture
The rapid revolution in microprocessor chip architecture due to multicore technology is presenting unprecedented challenges to the application developers as well as system softwar...
Long Chen, Ziang Hu, Junmin Lin, Guang R. Gao
HCI
2007
13 years 9 months ago
ParSketch: A Sketch-Based Interface for a 2D Parametric Geometry Editor
ParSketch is a software prototype to evaluate the usability and functionality of a sketching interface aimed at defining 2D parametric sections. Currently, ParSketch interprets str...
Ferran Naya, Manuel Contero, Nuria Aleixos, Pedro ...
CODES
2006
IEEE
14 years 1 months ago
Data reuse driven energy-aware MPSoC co-synthesis of memory and communication architecture for streaming applications
The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as...
Ilya Issenin, Nikil Dutt
ADHOC
2008
88views more  ADHOC 2008»
13 years 7 months ago
Safari: A self-organizing, hierarchical architecture for scalable ad hoc networking
As wireless devices become more pervasive, mobile ad hoc networks are gaining importance, motivating the development of highly scalable ad hoc networking techniques. In this paper...
Shu Du, Ahamed Khan, Santashil PalChaudhuri, Ansle...
CODES
2009
IEEE
14 years 2 months ago
A variation-tolerant scheduler for better than worst-case behavioral synthesis
– There has been a recent shift in design paradigms, with many turning towards yield-driven approaches to synthesize and design systems. A major cause of this shift is the contin...
Jason Cong, Albert Liu, Bin Liu