415 search results - page 29 / 83 » Comparative evaluation of memory models for chip multiproces... |
IPPS
1997
IEEE
13 years 12 months ago
1997
IEEE
Abstract — Processor scheduling has received considerable attention in the context of shared-memory multiprocessor systems but has not received as much attention in distributed-m...
CODES
2006
IEEE
14 years 1 months ago
2006
IEEE
The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
NoC architectures can be adopted to support general communications among multiple IPs over multi-processor Systems on Chip (SoCs). In this work we illustrate the modeling and simu...
MICRO
2007
IEEE
14 years 2 months ago
2007
IEEE
In deep sub-micron ICs, growing amounts of ondie memory and scaling effects make embedded memories increasingly vulnerable to reliability and yield problems. As scaling progresses...
HPCA
2009
IEEE
14 years 8 months ago
2009
IEEE
Magnetic Random Access Memory (MRAM) is considered to be a promising future memory technology due to its low leakage power, high density and fast read speed. The heterogeneous int...