415 search results - page 65 / 83 » Comparative evaluation of memory models for chip multiproces... |
TVLSI
2008
13 years 7 months ago
2008
Applications in computer networks often require high throughput access to large data structures for lookup and classification. While advanced algorithms exist to speed these search...
ICPP
2008
IEEE
14 years 2 months ago
2008
IEEE
An asynchronous work-stealing implementation of dynamic load balance is implemented using Unified Parallel C (UPC) and evaluated using the Unbalanced Tree Search (UTS) benchmark ...
ISLPED
1996
ACM
13 years 11 months ago
1996
ACM
In this paper, we discuss on accuracy of several kinds of power dissipation model for CMOS VLSI circuits. Some researchers have proposed several efficient power estimation methods...
HPCA
2006
IEEE
14 years 8 months ago
2006
IEEE
As silicon technologies move into the nanometer regime, transistor reliability is expected to wane as devices become subject to extreme process variation, particle-induced transie...
FMCAD
2009
Springer
14 years 2 months ago
2009
Springer
—Given an erroneous design, functional verification returns an error trace exhibiting a mismatch between the specification and the implementation of a design. Automated design ...