415 search results - page 7 / 83 » Comparative evaluation of memory models for chip multiproces... |
201
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APCSAC
2007
IEEE
15 years 12 months ago
2007
IEEE
Although they have been the main server technology for many years, multiprocessors are undergoing a renaissance due to multi-core chips and the attractive scalability properties of...
156
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DATE
2008
IEEE
15 years 12 months ago
2008
IEEE
Efficient use of the memory hierarchy is critical for achieving high performance in a multiprocessor systemon-chip. An external memory that is shared between processors is a bottl...
180
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IEEEHPCS
2010
15 years 3 months ago
2010
Stream languages explicitly describe fork-join parallelism and pipelines, offering a powerful programming model for many-core Multi-Processor Systems on Chip (MPSoC). In an embedd...
159
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ISPASS
2009
IEEE
16 years 10 days ago
2009
IEEE
Until very recently, microprocessor designs were computation-centric. On-chip communication was frequently ignored. This was because of fast, single-cycle on-chip communication. T...
155
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ISCA
2009
IEEE
16 years 5 days ago
2009
IEEE
Caching techniques have been an efficient mechanism for mitigating the effects of the processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies, especially...