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JCSC
2002
129views more  JCSC 2002»
13 years 7 months ago
Leakage Current Reduction in VLSI Systems
There is a growing need to analyze and optimize the stand-by component of power in digital circuits designed for portable and battery-powered applications. Since these circuits re...
David Blaauw, Steven M. Martin, Trevor N. Mudge, K...
DATE
2006
IEEE
82views Hardware» more  DATE 2006»
14 years 1 months ago
Power-aware compilation for embedded processors with dynamic voltage scaling and adaptive body biasing capabilities
Traditionally, active power has been the primary source of power dissipation in CMOS designs. Although, leakage power is becoming increasingly more important as technology feature...
Po-Kuan Huang, Soheil Ghiasi
DSD
2006
IEEE
120views Hardware» more  DSD 2006»
14 years 1 months ago
Adaptive Power Management for the On-Chip Communication Network
— An on-chip communication network is most power efficient when it operates just below the saturation point. For any given traffic load the network can be operated in this regi...
Guang Liang, Axel Jantsch
DATE
2008
IEEE
128views Hardware» more  DATE 2008»
14 years 1 months ago
Dynamic Voltage Scaling of Supply and Body Bias Exploiting Software Runtime Distribution
This paper presents a method of dynamic voltage scaling (DVS) that tackles both switching and leakage power with combined Vdd/Vbs scaling and gives minimum average energy consumpt...
Sungpack Hong, Sungjoo Yoo, Byeong Bin, Kyu-Myung ...
DAC
2005
ACM
14 years 8 months ago
User-perceived latency driven voltage scaling for interactive applications
Power has become a critical concern for battery-driven computing systems, on which many applications that are run are interactive. System-level voltage scaling techniques, such as...
Le Yan, Lin Zhong, Niraj K. Jha