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VLSID
2007
IEEE
142views VLSI» more  VLSID 2007»
14 years 10 months ago
Controllability-driven Power Virus Generation for Digital Circuits
The problem of peak power estimation in CMOS circuits is essential for analyzing the reliability and performance of circuits at extreme conditions. The Power Virus problem involves...
K. Najeeb, Karthik Gururaj, V. Kamakoti, Vivekanan...
AGP
1999
IEEE
14 years 2 months ago
Comparing expressiveness of set constructor symbols
In this paper we consider the relative expressive power of two very common operators applicable to sets and multisets: the with and the union operators. For such operators we prove...
Agostino Dovier, Carla Piazza, Alberto Policriti
DAC
2006
ACM
14 years 11 months ago
Simultaneous time slack budgeting and retiming for dual-Vdd FPGA power reduction
Field programmable dual-Vdd interconnects are effective to reduce FPGA power. Assuming uniform length interconnects, existing work has developed time slack budgeting to minimize p...
Yu Hu, Yan Lin, Lei He, Tim Tuan
MM
2005
ACM
157views Multimedia» more  MM 2005»
14 years 3 months ago
Chameleon: application level power management with performance isolation
In this paper, we present Chameleon—an application-level power management approach for reducing energy consumption in mobile processors. Our approach exports the entire responsi...
Xiaotao Liu, Prashant J. Shenoy, Mark D. Corner
IWCMC
2006
ACM
14 years 4 months ago
Cross-layer performance analysis of joint rate and power adaptation schemes with multiple-user contention in Nakagami fading cha
Adaptively adjusting transmission rate and power to concurrently enhance goodput and save energy is an important issue in the wireless local area network (WLAN). However, goodput ...
Li-Chun Wang, Kuang-Nan Yen, Jane-Hwa Huang, Ander...