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DAC
2006
ACM
14 years 11 months ago
Fast analysis of structured power grid by triangularization based structure preserving model order reduction
In this paper, a Triangularization Based Structure preserving (TBS) model order reduction is proposed to verify power integrity of on-chip structured power grid. The power grid is...
Hao Yu, Yiyu Shi, Lei He
VLSID
2007
IEEE
142views VLSI» more  VLSID 2007»
14 years 4 months ago
Novel Architectures for High-Speed and Low-Power 3-2, 4-2 and 5-2 Compressors
The 3-2, 4-2 and 5-2 compressors are the basic components in many applications, in particular partial product summation in multipliers. In this paper novel architectures and desig...
Sreehari Veeramachaneni, Kirthi M. Krishna, Lingam...
ATS
2004
IEEE
87views Hardware» more  ATS 2004»
14 years 1 months ago
Low Power BIST with Smoother and Scan-Chain Reorder
In this paper, we propose a low-power testing methodology for the scan-based BIST. A smoother is included in the test pattern generator (TPG) to reduce average power consumption d...
Nan-Cheng Lai, Sying-Jyan Wang, Yu-Hsuan Fu
COGSCI
2010
160views more  COGSCI 2010»
13 years 10 months ago
Comprehension of Simple Quantifiers: Empirical Evaluation of a Computational Model
We examine the verification of simple quantifiers in natural language from a computational model perspective. We refer to previous neuropsychological investigations of the same pr...
Jakub Szymanik, Marcin Zajenkowski
VLSID
2003
IEEE
103views VLSI» more  VLSID 2003»
14 years 10 months ago
Minimum Dynamic Power CMOS Circuit Design by a Reduced Constraint Set Linear Program
In the previous work, the problem of nding gate delays to eliminate glitches has been solved by linear programs (LP) requiring an exponentially large number ofconstraints. By intr...
Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bush...