154 search results - page 22 / 31 » Comparing Multiported Cache Schemes |
DATE
2010
IEEE
14 years 13 days ago
2010
IEEE
—This paper presents a design space exploration of a selective load value prediction scheme suitable for energyaware Simultaneous Multi-Threaded (SMT) architectures. A load value...
APCSAC
2003
IEEE
14 years 20 days ago
2003
IEEE
The StrongARM processor features virtually-addressed caches and a TLB without address-space tags. A naive implementation therefore requires flushing of all CPU caches and the TLB ...
ISCA
1995
IEEE
13 years 11 months ago
1995
IEEE
This paper introduces dynamic self-invalidation (DSI), a new technique for reducing cache coherence overhead in shared-memory multiprocessors. DSI eliminates invalidation messages...
WCW
2004
Springer
14 years 21 days ago
2004
Springer
Abstract. Streaming media workloads have a number of desirable properties that make them good candidates for caching via proxy systems. The content does not get modified, and acce...
PIMRC
2008
IEEE
14 years 1 months ago
2008
IEEE
Abstract—Handoff procedure in IEEE 802.11 wireless networks must be accomplished with as little interruption as possible to maintain the required quality of service (QoS). We hav...