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VTC
2006
IEEE
103views Communications» more  VTC 2006»
14 years 2 months ago
Codeword Length Optimization for CPPUWB Systems
— The optimal codeword length that generates the maximum output signal to interference ratio (SIR) for the channel-phase-precoded ultra-wideband (CPPUWB) system proposed in [1] i...
Yu-Hao Chang, Shang-Ho Tsai, Xiaoli Yu, C. C. Jay ...
ISQED
2005
IEEE
95views Hardware» more  ISQED 2005»
14 years 2 months ago
Power Supply Noise-Aware Scheduling and Allocation for DSP Synthesis
As technology scales down, power supply noise is becoming a performance and reliability bottleneck in modern VLSI. We propose a power supply noise-aware design methodology for hig...
Dongku Kang, Yiran Chen, Kaushik Roy
ICC
2000
IEEE
14 years 1 months ago
A Class of Block-Iterative Equalizers for Intersymbol Interference Channels
—A new and efficient class of nonlinear equalizers is developed for intersymbol interference (ISI) channels. These “iterated-decision equalizers” use an optimized multipass a...
Albert M. Chan, Gregory W. Wornell
ICANN
2007
Springer
14 years 22 days ago
Fuzzy Classifiers Based on Kernel Discriminant Analysis
In this paper, we discuss fuzzy classifiers based on Kernel Discriminant Analysis (KDA) for two-class problems. In our method, first we employ KDA to the given training data and ca...
Ryota Hosokawa, Shigeo Abe
CODES
2004
IEEE
14 years 19 days ago
Automatic synthesis of system on chip multiprocessor architectures for process networks
In this paper, we present an approach for automatic synthesis of System on Chip (SoC) multiprocessor architectures for applications expressed as process networks. Our approach is ...
Basant Kumar Dwivedi, Anshul Kumar, M. Balakrishna...