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ERCIMDL
2009
Springer
138views Education» more  ERCIMDL 2009»
13 years 5 months ago
A Hybrid Distributed Architecture for Indexing
This paper presents a hybrid scavenger grid as an underlying hardware architecture for search services within digital libraries. The hybrid scavenger grid consists of both dedicate...
Ndapandula Nakashole, Hussein Suleman
DATE
2004
IEEE
146views Hardware» more  DATE 2004»
13 years 11 months ago
Analyzing On-Chip Communication in a MPSoC Environment
This work focuses on communication architecture analysis for multi-processor Systems-on-Chips (MPSoCs), and it leverages a SystemC-based platform to simulate a complete multi-proc...
Mirko Loghi, Federico Angiolini, Davide Bertozzi, ...
DATE
2003
IEEE
145views Hardware» more  DATE 2003»
14 years 19 days ago
Automated Bus Generation for Multiprocessor SoC Design
The performance of a system, especially a multiprocessor system, heavily depends upon the efficiency of its bus architecture. This paper presents a methodology to generate a custo...
Kyeong Keol Ryu, Vincent John Mooney
IPPS
1998
IEEE
13 years 11 months ago
Impact of Switch Design on the Application Performance of Cache-Coherent Multiprocessors
In this paper, the effect of switch design on the application performance of cache-coherent non-uniform memory access (CC-NUMA) multiprocessors is studied in detail. Wormhole rout...
Laxmi N. Bhuyan, Hu-Jun Wang, Ravi R. Iyer, Akhile...
CORR
2010
Springer
128views Education» more  CORR 2010»
13 years 7 months ago
A Performance Study of GA and LSH in Multiprocessor Job Scheduling
Multiprocessor task scheduling is an important and computationally difficult problem. This paper proposes a comparison study of genetic algorithm and list scheduling algorithm. Bo...
S. R. Vijayalakshmi, G. Padmavathi