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» Comparing the Optimal Performance of Parallel Architectures
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HPCA
2008
IEEE
14 years 8 months ago
DeCoR: A Delayed Commit and Rollback mechanism for handling inductive noise in processors
Increases in peak current draw and reductions in the operating voltages of processors continue to amplify the importance of dealing with voltage fluctuations in processors. Noise-...
Meeta Sharma Gupta, Krishna K. Rangan, Michael D. ...
HPCA
2007
IEEE
14 years 8 months ago
HARD: Hardware-Assisted Lockset-based Race Detection
The emergence of multicore architectures will lead to an increase in the use of multithreaded applications that are prone to synchronization bugs, such as data races. Software sol...
Pin Zhou, Radu Teodorescu, Yuanyuan Zhou
CORR
2011
Springer
197views Education» more  CORR 2011»
13 years 3 months ago
High-Throughput Transaction Executions on Graphics Processors
OLTP (On-Line Transaction Processing) is an important business system sector in various traditional and emerging online services. Due to the increasing number of users, OLTP syste...
Bingsheng He, Jeffrey Xu Yu
DAC
2002
ACM
14 years 9 months ago
Design of a high-throughput low-power IS95 Viterbi decoder
The design of high-throughput large-state Viterbi decoders relies on the use of multiple arithmetic units. The global communication channels among these parallel processors often ...
Xun Liu, Marios C. Papaefthymiou
JSSPP
2007
Springer
14 years 2 months ago
A Job Self-scheduling Policy for HPC Infrastructures
The number of distributed high performance computing architectures has increased exponentially these last years. Thus, systems composed by several computational resources provided ...
Francesc Guim, Julita Corbalán