151 search results - page 12 / 31 » Comparison of Hardware and Software Cache Coherence Schemes |
SIGMETRICS
1996
ACM
13 years 11 months ago
1996
ACM
A large and increasing gap exists between processor and memory speeds in scalable cache-coherent multiprocessors. To cope with this situation, programmers and compiler writers mus...
HPCA
1999
IEEE
13 years 12 months ago
1999
IEEE
Symmetric multiprocessors (SMPs) connected with low-latency networks provide attractive building blocks for software distributed shared memory systems. Two distinct approaches hav...
ICPP
2003
IEEE
14 years 25 days ago
2003
IEEE
Hardware prefetching is a simple and effective technique for hiding cache miss latency and thus improving the overall performance. However, it comes with addition of prefetch buff...
IEEEPACT
2008
IEEE
14 years 1 months ago
2008
IEEE
This paper presents the Distributed Cooperative Caching, a scalable and energy-efficient scheme to manage chip multiprocessor (CMP) cache resources. The proposed configuration is...
ICESS
2007
Springer
14 years 1 months ago
2007
Springer
Abstract. We propose a novel route optimization protocol for intraNEMO communication using a hierarchical and distributed caching scheme. The proposed scheme employs the routing ca...