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» Comparison of Hardware and Software Cache Coherence Schemes
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CASES
2003
ACM
14 years 24 days ago
Compiler-decided dynamic memory allocation for scratch-pad based embedded systems
This paper presents a highly predictable, low overhead and yet dynamic, memory allocation strategy for embedded systems with scratch-pad memory. A scratch-pad is a fast compiler-m...
Sumesh Udayakumaran, Rajeev Barua
ISCA
2003
IEEE
116views Hardware» more  ISCA 2003»
14 years 24 days ago
A "Flight Data Recorder" for Enabling Full-System Multiprocessor Deterministic Replay
Debuggers have been proven indispensable in improving software reliability. Unfortunately, on most real-life software, debuggers fail to deliver their most essential feature — a...
Min Xu, Rastislav Bodík, Mark D. Hill
ETT
2006
138views Education» more  ETT 2006»
13 years 7 months ago
Comparison of modified dual queue and EDCA for VoIP over IEEE 802.11 WLAN
The popular IEEE 802.11 WLAN today does not provide any quality-of-service (QoS) because of its contention-based channel access nature of the medium access control (MAC). Therefore...
Jeonggyun Yu, Sunghyun Choi
ISCA
2002
IEEE
104views Hardware» more  ISCA 2002»
14 years 14 days ago
Using a User-Level Memory Thread for Correlation Prefetching
This paper introduces the idea of using a User-Level Memory Thread (ULMT) for correlation prefetching. In this approach, a user thread runs on a general-purpose processor in main ...
Yan Solihin, Josep Torrellas, Jaejin Lee
ICSEA
2007
IEEE
14 years 1 months ago
A Model for the Effect of Caching on Algorithmic Efficiency in Radix based Sorting
— This paper demonstrates that the algorithmic performance of end user programs may be greatly affected by the two or three level caching scheme of the processor, and we introduc...
Arne Maus, Stein Gjessing