151 search results - page 27 / 31 » Comparison of Hardware and Software Cache Coherence Schemes |
ISCA
2008
IEEE
14 years 1 months ago
2008
IEEE
A high-concurrency transactional memory (TM) implementation needs to track concurrent accesses, buffer speculative updates, and manage conflicts. We present a system, FlexTM (FLE...
LCR
2000
Springer
13 years 11 months ago
2000
Springer
Abstract. As an alternative to message passing, Rochester's InterWeave system allows the programmer to map shared segments into programs spread across heterogeneous, distribut...
MICRO
2010
IEEE
13 years 5 months ago
2010
IEEE
A particularly insidious type of concurrency bug is atomicity violations. While there has been substantial work on automatic detection of atomicity violations, each existing techn...
DATE
2010
IEEE
14 years 18 days ago
2010
IEEE
Abstract—This paper addresses the problem of execution time estimation for tasks in a software pipeline independent of the application structure or the underlying architecture. A...
CASES
2007
ACM
13 years 11 months ago
2007
ACM
The memory intensive nature of object-oriented languages such as C++ and Java has created the need of a high-performance dynamic memory management (DMM); however, it is a challeng...