138 search results - page 16 / 28 » Compiled-code-based simulation with timing verification |
DSRT
2008
IEEE
13 years 9 months ago
2008
IEEE
In this contribution a new system for the rapid development of real-time prototypes for digital audio signal processing algorithms on Windows PCs and a Digital Signal Processor (D...
EURODAC
1994
IEEE
13 years 11 months ago
1994
IEEE
- The accelerator is destined to circuit-level simulation of digital and analog/digital MOS VLSI'c containing of up to 100 thousand transistors (with 16 Mb RAM host-machine). ...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
Simulation and verification using electronic design automation (EDA) tools are key steps in the design process for communication and signal processing systems. The synchronous dat...
ICCAD
2003
IEEE
14 years 26 days ago
2003
IEEE
Process variations have become a critical issue in performance verification of high-performance designs. We present a new, statistical timing analysis method that accounts for int...
ASPDAC
2006
ACM
14 years 1 months ago
2006
ACM
As technology scales down, timing verification of digital integrated circuits becomes an increasingly challenging task due to the gate and wire variability. Therefore, statistical...