138 search results - page 20 / 28 » Compiled-code-based simulation with timing verification |
DAC
2002
ACM
14 years 8 months ago
2002
ACM
The ability to compute the parasitic inductance of the interconnect is critical to the timing verification of modern VLSI circuits. A challenging aspect of inductance extraction i...
GLVLSI
2008
IEEE
13 years 7 months ago
2008
IEEE
Due to the increasing complexity of today's circuits a high degree of automation in the design process is mandatory. The detection of faults and design errors is supported qu...
DAC
2002
ACM
14 years 8 months ago
2002
ACM
Rapid approximation of the transient response of high-speed global interconnects is needed to estimate the time delay, crosstalk, and overshoot in a GSI multilevel wiring network....
DAC
2006
ACM
14 years 8 months ago
2006
ACM
Modern integrated circuits (ICs) are becoming increasingly complex. The complexity makes it difficult to design, manufacture and integrate these high-performance ICs. The advent o...
UML
2001
Springer
14 years 21 hour ago
2001
Springer
The work presented here is part of a project that aims at the definition of a methodology for developing realtime software systems based on UML. In fact, being relatively easy to ...