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» Compiler Technology for Two Novel Computer Architectures
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ICALT
2005
IEEE
14 years 1 months ago
ActiveTutor
In this paper we present an architecture dedicated to an intelligently assisted educational tool which integrates within a unified framework software rational agents both at the m...
Jean Pierre Fournier
MST
2002
107views more  MST 2002»
13 years 7 months ago
A Comparison of Asymptotically Scalable Superscalar Processors
The poor scalability of existing superscalar processors has been of great concern to the computer engineering community. In particular, the critical-path lengths of many components...
Bradley C. Kuszmaul, Dana S. Henry, Gabriel H. Loh
DAC
2001
ACM
14 years 8 months ago
Chaff: Engineering an Efficient SAT Solver
Boolean Satisfiability is probably the most studied of combinatorial optimization/search problems. Significant effort has been devoted to trying to provide practical solutions to ...
Matthew W. Moskewicz, Conor F. Madigan, Ying Zhao,...
VLSID
2009
IEEE
108views VLSI» more  VLSID 2009»
14 years 8 months ago
Metric Based Multi-Timescale Control for Reducing Power in Embedded Systems
Abstract--Digital control for embedded systems often requires low-power, hard real-time computation to satisfy high control-loop bandwidth, low latency, and low-power requirements....
Forrest Brewer, João Pedro Hespanha, Nitin ...
HPCA
2009
IEEE
14 years 2 months ago
Soft error vulnerability aware process variation mitigation
As transistor process technology approaches the nanometer scale, process variation significantly affects the design and optimization of high performance microprocessors. Prior stu...
Xin Fu, Tao Li, José A. B. Fortes