105 search results - page 3 / 21 » Compiler-managed partitioned data caches for low power |
DAC
1999
ACM
14 years 8 months ago
1999
ACM
We present a novel approach that minimizes the power consumption of embedded core-based systems through hardware/software partitioning. Our approach is based on the idea of mapping...
ISLPED
1995
ACM
13 years 11 months ago
1995
ACM
In current processors, the cache controller, which contains the cache directory and other logic such as tag comparators, is active for each instruction fetch and is responsible fo...
DAC
2002
ACM
14 years 8 months ago
2002
ACM
In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...
WMPI
2004
ACM
14 years 26 days ago
2004
ACM
The size and speed of first-level caches and SRAMs of embedded processors continue to increase in response to demands for higher performance. In power-sensitive devices like PDAs a...
DSD
2008
IEEE
13 years 9 months ago
2008
IEEE