3056 search results - page 80 / 612 » Compiling Embedded Languages |
ISCAS
2006
IEEE
14 years 2 months ago
2006
IEEE
Abstract— NnSP is a stream-based programmable and codelevel statically reconfigurable processor for realization of neural networks in embedded systems. NnSP is provided with a n...
CASES
2007
ACM
14 years 5 days ago
2007
ACM
The key to increasing performance without a commensurate increase in power consumption in modern processors lies in increasing both parallelism and core specialization. Core speci...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
—This paper explores the use of dynamic compilation for continuing execution even if one or more of the memory banks used by an application become temporarily unavailable (but th...
CGO
2008
IEEE
14 years 2 months ago
2008
IEEE
Vector-thread (VT) architectures exploit multiple forms of parallelism simultaneously. This paper describes a compiler for the Scale VT architecture, which takes advantage of the ...
CASES
2008
ACM
13 years 10 months ago
2008
ACM
Embedded processor performance is dependent on both the underlying architecture and the compiler optimisations applied. However, designing both simultaneously is extremely difficu...