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ASAP
2005
IEEE
87views Hardware» more  ASAP 2005»
14 years 1 months ago
Expression Synthesis in Process Networks generated by LAURA
The COMPAAN/LAURA [18] tool chain maps nested loop applications written in Matlab onto reconfigurable platforms, such as FPGAs. COMPAAN rewrites the original Matlab application a...
Claudiu Zissulescu, Bart Kienhuis, Ed F. Depretter...
TOG
2012
230views Communications» more  TOG 2012»
11 years 10 months ago
Decoupling algorithms from schedules for easy optimization of image processing pipelines
Using existing programming tools, writing high-performance image processing code requires sacrificing readability, portability, and modularity. We argue that this is a consequenc...
Jonathan Ragan-Kelley, Andrew Adams, Sylvain Paris...
CODES
2005
IEEE
14 years 1 months ago
Future wireless convergence platforms
As wireless platforms converge to multimedia systems, architectures must converge to support voice, data, and video applications. From a processor architecture perspective, suppor...
C. John Glossner, Mayan Moudgill, Daniel Iancu, Ga...
CSE
2009
IEEE
13 years 11 months ago
Real Time Rectification for Stereo Correspondence
Duplicating the full dynamic capabilities of the human eye-brain combination is a difficult task but an important goal because of the wide application that a system which can acqu...
Khurram Jawed, John Morris, Tariq Khan, Georgy L. ...
DAC
2002
ACM
14 years 8 months ago
Compiler-directed scratch pad memory hierarchy design and management
One of the primary challenges in embedded system design is designing the memory hierarchy and restructuring the application to take advantage of it. This task is particularly impo...
Mahmut T. Kandemir, Alok N. Choudhary