559 search results - page 48 / 112 » Compiling Image Processing Applications to Reconfigurable Ha... |
FPL
2009
Springer
14 years 10 days ago
2009
Springer
Spatially-tiled architectures, such as Coarse-Grained Reconfigurable Arrays (CGRAs), are powerful architectures for accelerating applications in the digital-signal processing, em...
FPL
2010
Springer
13 years 5 months ago
2010
Springer
We demonstrate how Field Programmable Gate Arrays (FPGAs) may be used to address the computing challenges associated with assembling genome sequences from recent ultra-high-through...
CODES
2005
IEEE
14 years 1 months ago
2005
IEEE
Multimedia vector instruction sets are becoming ubiquitous in most of the embedded systems used for multimedia, networking and communications. However, current compiler technology...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper presents an Application Specific Instruction Set Processor (ASIP) design for the implementation of a class of nonlinear image processing algorithms, the Retinex-like fi...
EUROCAST
2007
Springer
13 years 11 months ago
2007
Springer
abstract Parsing schemata [4] provide a formal, simple and uniform way to describe, analyze and compare different parsing algorithms. The notion of a parsing schema comes from cons...