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RTAS
1997
IEEE
14 years 2 months ago
Scalable Hardware Priority Queue Architectures for High-Speed Packet Switches
ÐWith effective packet-scheduling mechanisms, modern integrated networks can support the diverse quality-of-service requirements of emerging applications. However, arbitrating bet...
Sung-Whan Moon, Kang G. Shin, Jennifer Rexford
DATE
2003
IEEE
112views Hardware» more  DATE 2003»
14 years 3 months ago
Safe Automotive Software Development
Automotive systems engineering has made significant progress in using formal methods to design safe hardware-software systems. The architectures and design methods could become a ...
Ken Tindell, Hermann Kopetz, Fabian Wolf, Rolf Ern...
CN
2008
109views more  CN 2008»
13 years 10 months ago
CoCONet: A collision-free container-based core optical network
Electrical-to-optical domain conversions and vice versa (denoted by O/E/O conversions) for each hop in optical core transport networks impose considerable capital and financial ov...
Amin R. Mazloom, Preetam Ghosh, Kalyan Basu, Sajal...
FCCM
2000
IEEE
162views VLSI» more  FCCM 2000»
14 years 2 months ago
StReAm: Object-Oriented Programming of Stream Architectures Using PAM-Blox
Simplifying the programming models is paramount to the success of reconfigurable computing. We apply the principles of object-oriented programming to the design of stream archite...
Oskar Mencer, Heiko Hübert, Martin Morf, Mich...
DAC
1994
ACM
14 years 2 months ago
Minimal Delay Interconnect Design Using Alphabetic Trees
Abstract - We propose a new algorithm for the performancedriven interconnect design problem, based on alphabetic trees. The interconnect topology is determined in a global manner a...
Ashok Vittal, Malgorzata Marek-Sadowska