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DAC
1994
ACM
15 years 7 months ago
Synthesis of Instruction Sets for Pipelined Microprocessors
We present a systematic approach to synthesize an instruction set such that the given application software can be efficiently mapped to a parameterized, pipelined microarchitectur...
Ing-Jer Huang, Alvin M. Despain
112
Voted
DAC
1992
ACM
15 years 7 months ago
Synthesis from Production-Based Specifications
This paper describes a model for, and an implementation of, production-based synthesis of hardware description language (HDL) code in which the overall structure of the resultant ...
Andrew Seawright, Forrest Brewer
132
Voted
DATE
2004
IEEE
114views Hardware» more  DATE 2004»
15 years 7 months ago
Power Aware Variable Partitioning and Instruction Scheduling for Multiple Memory Banks
Many high-end DSP processors employ both multiple memory banks and heterogeneous register files to improve performance and power consumption. The complexity of such architectures ...
Zhong Wang, Xiaobo Sharon Hu
140
Voted
ICECCS
1995
IEEE
108views Hardware» more  ICECCS 1995»
15 years 7 months ago
Using speculative execution for fault tolerance in a real-time system
Achieving fault-tolerance using a primary-backup approach involves overhead of recovery such as activating the backup and propagating execution states, which may a ect the timelin...
Mohamed F. Younis, Grace Tsai, Thomas J. Marlowe, ...
PLDI
1995
ACM
15 years 7 months ago
EEL: Machine-Independent Executable Editing
EEL (Executable Editing Library) is a library for building tools to analyze and modify an executable (compiled) program. The systems and languages communities have built many tool...
James R. Larus, Eric Schnarr