1198 search results - page 133 / 240 » Compiling for EDGE Architectures |
131
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IEEEPACT
2002
IEEE
15 years 8 months ago
2002
IEEE
Java exception checks are designed to ensure that any faulting instruction causing a hardware exception does not terminate the program abnormally. These checks, however, impose so...
145
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EMSOFT
2010
Springer
15 years 1 months ago
2010
Springer
We propose the first polynomial-time code selection algorithm for minimising the worst-case execution time of a nonnested loop executed on a fully pipelined processor that uses sc...
141
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DAC
2009
ACM
16 years 4 months ago
2009
ACM
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access will result in a definite cache hit or miss. This unpredictabilit...
108
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DAC
2004
ACM
16 years 4 months ago
2004
ACM
Scratch-pad memories (SPMs) enable fast access to time-critical data. While prior research studied both static and dynamic SPM management strategies, not being able to keep all ho...
109
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HPCA
2005
IEEE
16 years 3 months ago
2005
IEEE
The issue logic of a superscalar processor dissipates a large amount of static and dynamic power. Furthermore, its power density makes it a hot-spot requiring expensive cooling sy...